Markus Leiter
P2L2 GmbH
Markus Leiter is an experienced FPGA Design and Verification Engineer with a strong background in embedded systems design.
He co-founded P2L2 GmbH, an FPGA Design Center based in Hagenberg, Austria, where he currently serves as CEO.
His expertise spans various aspects of FPGA design, including concept engineering, functional verification, and timing analysis.
In addition to his role at P2L2, Markus works as a Teaching Assistant and Tutor at the University of Applied Sciences Upper Austria, focusing on VHDL design and verification methodologies.
Wednesday, 2 July 2025
4:30 - 6:00 pm
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