Michal Pacula

Aldec, Inc.

Michal Pacula, Technical Support Manager, over 25-year experience in FPGA/SoC, joined Aldec in 1998 and worked in a wide range of positions that include Application Engineer and SQA Manager responsible for Active-CAD, Active-HDL and Riviera-PRO products. Michal’s practical experience includes Digital Design, Verification Methodologies, Linting and a deep understanding of HDL modeling. Michal graduated with M.S. in Electronic Engineering (EE) at the Silesian University of Technology in Gliwice, Poland.