The best, most progressive leaders in the field
Afef Zakhama
FPGA Application Engineer | Future Electronics
I began my career in 2010, as a hardware engineer at Hcell-Engineering, a company specializing in providing solutions, complex soft IP and custom design development in accordance with the design assurance guidance for airborne electronic hardware, RTCA DO254, up to DAL A, targeting FPGA and ASIC technologies. After spending 5 years in the aerospace industry, I pursued my Ph.D at the National Engineering School of Tunis (ENIT) while continuing to work at the same company. After, 11 years of experience on FPGA development environments, I Joined Future on Mars in 2022 as an EMEA FPGA Application engineer.
Passionate about the latest FPGA technologies and SoCs, I have a strong interest in the applications that leverage both the new hard and soft IPs embedded within advanced FPGAs.
Alain Darte
AMD
Alain Darte is principal architect for the AMD high-level synthesis tool Vitis HLS. He joined the Xilinx HLS team in 2017 after more than 25 years as an academic researcher at CNRS (French Council for Research) in the field of program analysis and optimizations for high-performance computing and the synthesis of hardware accelerators. With 90+ papers, his main contributions are in parallelism detection algorithms, loop optimizations, memory reuse, and static single assignment (SSA).
In Vitis HLS, he is the main re-architect of the so-called dataflow optimizations, and in charge of throughput optimizations and of the front-end of the tool. He holds a PhD in computer science from Ecole Normale Supérieure in Lyon.
Alexander Daum
FH Oberösterreich Studienbetriebs GmbH
Alexander Daum holds a bachelor's degree from the University of Applied
Sciences of Upper Austria at Hagenberg and is currently studying for a Master's
degree in Embedded Systems Design. There he specializes in FPGA Design and
Digital Signal Processing.
Alexander is experienced in creating sophisticated designs targeting both
Altera and Xilinx FPGAs, that include developing low-level software
applications and Linux kernel drivers. In an ongoing project, Alexander is
working with an AMD Xilinx RFSoC FPGA to implement a high-speed data sampling system.
Besides his studies, Alexander is employeed at Infineon Technologies in the department for automotive radar firmware development.
Alexander Flick
PLC2
Alexander Flick develops FPGAs for more than 15 years ranging from logic-only design to embedded systems with application specific extensions. He has deployed softcore processors as well as hard-IP ARM controllers in different device families.
Since 2020 he holds a trainer position at PLC2. His main focus is on the AMD tool chain for Arm-based programmable SoCs / MPSoCs and the new intelligent acceleration concepts coming with the AMD Vitis development tools. Currently, he was awarded as number 2 of the AMD top trainers worldwide in 2023.
Alexander Wirthmüller
MPSI Technologies GmbH
Alexander Wirthmueller is a multi-skilled engineer with two decades of experience in solving problems with software. His past projects led him to work with low-level MCU-/FPGA-based electronics and single board computers, all the way to cloud-based scientific simulations. More recently Alexander decided to devote himself to providing the embedded software community with powerful developer tools which eliminate most monotonous aspects of coding. Alexander lives in Munich where he runs MPSI Technologies.
Andreas Kick
Siemens AG
Andreas Kick studied electrical engineering and information technology at OTH Regensburg, specialising in embedded intelligent systems. His master's thesis involved piloting a new technology module for the SIMATIC, in which the integrated FPGA communicates with an optical scan head. In addition to the realisation of FPGA applications, his work at Siemens Customer Service includes embedded software engineering and support for PLC software.
Andreas Schuler
Missing Link Electronics
Andreas Schuler is Director Applications at Missing Link Electronics where he coordinates joint work of Xilinx, customers and MLE. His field of operation reaches over Architecture design, Image processing, Security, Neural Networks to product development.
Andreas Schuler holds a degree in Industrial Electronics (B.Eng.) from Ulm University of Applied Sciences, Germany.
Angelo LoCicero
Intel Deutschland GmbH
Angelo Lo Cicero is Technical Sales Specialist at Intel PSG with special focus on the IoT market and he’s working on FPGA related topics since 2008. He started his career as an hardware designer where he was responsible for designs, integration and verification of several processor based digital designs. Angelo holds a degree from the University of Palermo.
Anton Fogel
Lauterbach GmbH
Anton Fogel
graduated from the University of Heilbronn with a Masters degree in Electrical Systems Engineering and has been working for Lauterbach as a Systems Engineer for 1.5 years. He has experience in hardware-software co-design and has successfully completed numerous projects in this area.
Dr. Aurang Zaib
Microchip Technology GmbH
Dr. Aurang Zaib is a Principal Embedded Solutions Engineer at Microchip Technology Germany GmbH.
He is a seasoned professional with more than 15 years of Industrial and Academic experience of delivering successful projects. Aurang holds a PhD degree from the Technical University of Munich (TUM). He specializes in the areas of Hardware Software Co-design and Machine Learning for Embedded Systems. Before his present engagement, he has been involved in the design and development of complex real time Systems with a strong focus on Image and Video Processing Applications. In his recent assignments, he uses his technical skills and experience to mentor clients
Dr. Baris Konuk
Field Application Engineer - FPGA Specialist, Central Europe | Future Electronics
I obtained the B.Sc. degree from Middle East Technical University (METU) Electrical and Electronics Engineering Department in 2004. After graduation, I started to work as an Embedded Software Engineer in Aselsan Inc., a leading defense company in Turkey. Meanwhile, I continued my academic studies and obtained the M.Sc. and Ph.D. degrees from the same department in 2007 and 2015, respectively. After then, I also participated as a part-time lecturer in signal processing and telecommunications area in different universities in Turkey. After 17 years of experience on FPGAs and embedded software in Aselsan Inc., I joined Future Electronics in October 2022 as an FPGA specialist responsible for the Central Europe region.
Baruch Mitsengendler
The MathWorks GmbH
Baruch Mitsengendler is a senior application engineer working at MathWorks in Germany since 2016. He provides technical expertise in applying MathWorks capabilities within various HDL-related applications. Prior to joining MathWorks, Baruch worked as an ASIC design and verification engineer, both in Israel and Germany where his focus areas were wireline communication systems as well as memory solutions. Baruch holds a B.Sc. degree in Electrical Engineering from Technion, Israel Institute of Technology
Ben Lee
Chief Revenue Officer | Altera
Ben Lee is Chief Revenue Officer of Altera, an Intel company. He is responsible for the company’s revenue growth strategy, leading customer-facing teams, and driving demand creation and channel partnerships in alignment with Altera’s vision and mission.
Before his current role, Lee was president and chief executive officer of Movella since January 2013. He has held several other leadership roles including senior vice president of worldwide sales at Cypress Semiconductor, chief operating officer at Apexone Microelectronics, vice president of worldwide marketing at Chartered Semiconductor, and general manager of China Region at National Semiconductor.
Lee has previous experience with Altera serving as vice president of Asia Pacific and managing director of Altera International Ltd from 2000 to 2006.
Lee began his career as a system integration engineer at IBM’s Federal Systems Division in New York. He holds a Bachelor of Science degree in electrical engineering from California Polytechnic State University, San Luis Obispo, and an MBA in marketing from Golden Gate University, San Francisco.
Prof. Dr. Bernhard Lang
Hochschule Osnabrück
Bernhard Wandl
FH Oberösterreich Studienbetriebs GmbH - P2L2 GmbH
Bernhard Wandl is an experienced electronics and computer engineer with a focus on embedded systems, particularly FPGAs and everything surrounding them. He holds a master's degree in Embedded Systems Design from the University of Applied Sciences Upper Austria.
Currently, Bernhard is an FPGA Engineer at P2L2 GmbH. In recent years, he has specialized particularly in high-data-rate applications implemented using AMD Xilinx RFSoC FPGAs. These include, for example, Ethernet transmissions of up to 100Gbps and a high-speed OFDM transceiver with a bandwidth of up to 2 GHz.
In addition to implementing FPGA designs, his work also includes integrating them into a complete system. This may involve setting up an embedded Linux system on an SoC or connecting the FPGA to an external microcontroller.
Brian Colgan
Microchip Technology GmbH
Brian has many years’ experience in the semiconductor industry, previously working in Xilinx’s research lab; as sales representative for Cypress Semiconductor; and as an FPGA FAE at EPS Global. He is currently a Business Development Manager in the FPGA Business Unit at Microchip Technology where he supports customers throughout Europe. Brian has a Bachelor of Engineering (Honours) in Computer Engineering from the Dublin Institute of Technology (now TU Dublin).
Christiaan Baaij
QBayLogic B.V.
I enjoy tackling the design challenges in computer science, electrical engineering, and their intersection.
I feel privileged that I could pursue those interests when building the initial version of the Clash compiler as part of my MSc and PhD degree.
One of the reasons for me to start QBayLogic, an FPGA design house, was to create a place where people could enjoy solving that same mix of challenges.
Dr. Christian Färber
Intel Deutschland GmbH
Christian Färber is TS-FAE for FPGA compute acceleration and AI at Altera since 2019 and is working with FPGAs since 2008. He started his career as an hardware development engineer in the automotive industry at Vector Informatik and moved on as senior fellow at CERN in Geneva Switzerland, where he investigated the usage of FPGA compute acceleration in high energy physics for 3 years. Before joining Intel he worked at Thales as senior FPGA design engineer developing railway safety systems. Christian received his diploma in physics from Heidelberg University, and holds a PhD in particle physics from Heidelberg University about radiation effects on SRAM-based FPGA hardware and its mitigation.
Christian Michel
Lattice Semiconductor GmbH
Christian is a design expert for ASICs and FPGAs since they left their start-up phase to an electronic market-dominating phase.
He was able and allowed working together with many FPGA vendors, design SW companies and design houses in the past years.
Since 2012 he is bringing in his detailed experience - as senior FAE at Lattice Semiconductor – to the European customer base.
Let you guide through the Lattice Semiconductor solutions by him.
Daniel Spahr
COO | Stream Analyze
I’m an experienced global top-level manager with a successful track record of driving, growing and developing strategic business transformation and digital initiatives. Digital business and using technology as driver for transformation are a part of my daily job.
I have a successful track record in change management and business transformation at C-level. I have built global IT organizations, including complex outsourcing contracts, M&As and divestments. I deliver results based on clear direction settings and prompt decision-making, building strong and efficient teams. I’m a skilled communicator, creating a constructive dialogue.
I am currently COO at Stream Analyze, mainly focusing on our go-to-market strategy and operations, encompassing both customers and partners, such as Microchip.
David Kirchner
World of FPGA
David Kirchner is the founder of the World of FPGA, an online learning platform for FPGA development. After studying electrical engineering at TU Berlin, he has been working as a hardware, firmware and FPGA developer for nearly 20 years. Moreover, he has experience as a leader in various companies and as a trainer, particularly during his teaching position at the Berlin University of Applied Sciences and Technology.
Davide Cieri
Max Planck Institute for Physics
Dr. Davide Cieri is a Staff Scientist at the Max-Planck-Institute for physics in Munich. He is responsible for the upgrade of the first-level muon trigger of the ATLAS experiment at CERN, which operates on Xilinx FPGAs. His mainly contributions are in the development of the reconstruction algorithm and its FPGA implementation. Davide is also passionate about open-source project, and is the author of the widely used tool Hog (HDL-on-git), to manage HDL code on git.
Finally, he chairs the FPGA developers’ Forum (FDF), a common platform to discuss and exchange information, experiences, implementation ideas, tips, and tricks as well as challenges faced with design tools, specific FPGA technologies.
Dimitri Hamidi
The MathWorks GmbH
Dimitri Hamidi is Senior Application Engineer at MathWorks since 2018, with a focus on HDL code generation and verification, as well as signal and image processing. He received a diploma degree in electrical and information technology engineering from the Technical University of Munich. Prior to joining MathWorks, he worked as a research associate at the German Aerospace Center (DLR), served as FPGA engineer at FEI and algorithm engineer at Continental.
Prof. Dirk Koch
Heidelberg University
Dirk Koch leads the Novel Computing Technologies group at Heidelberg University. Before, he worked in the Advanced Processor Technologies Group at the University of Manchester, the University of Oslo, UBC Vancouver, and the University of Erlangen Nuremberg. His main research interests include run-time reconfigurable systems based on FPGAs, embedded systems, computer architecture, VLSI design, and hardware security. Dirk’s group developed the GoAhead tool for implementing partial reconfiguration on FPGAs, the FPGADefender bistream virus scanner, and the FABulous open-source embedded FPGA generation framework. The latter was used to design chips in TSMC and Skywater processes including a memristor (ReRAM) non-volative FPGA. Dirk Koch is the author of the book “Partial Reconfiguration on FPGAs” and a co-editor of the book “FPGAs for Software Programmers”.
Dirk van den Heuvel
Topic Embedded Systems
My name is Dirk van den Heuvel (1967), Principal Consultant at TOPIC. I have an academic degree in electronics engineering and graduated on a tool for graphical modelling and automatic code generation of hierarchical state machines for specifically FPGA devices. After having worked for several other design houses, I joined TOPIC in 2007 as an embedded systems designer. Most of the (embedded) projects I have been involved with use FPGAs as well as application processors or micro-controllers. Applications vary from ppb-accurate VCXO design to multi-stream video processing applications, from medical sensor devices to ultrasound imaging. At TOPIC I co-founded the patented Dyplo® concept, a FPGA-based Network-On-Chip solution wrapping partial reconfigurable functions in a deterministic manner with full Linux software integration. Currently, I am consultant at TOPIC and technically responsible for the premier partnership with AMD/Xilinx as well as the System-On-Modules portfolio of TOPIC.
Dr. Dmitry Eliseev
RWTH Aachen University
Dmitry began his career in 2006 as an electronics developer for scanning probe microscopes. After six years in industry, he started his PhD in engineering at RWTH Aachen University, where he developed electronics and FPGA firmware for acoustic sensors and phased arrays. As a PostDoc at RWTH Aachen, he is currently contributing to the upgrade of the CMS detector at CERN, developing electronics and firmware for the gaseous particle detectors. Dmitry is passionate about FPGAs and SoCs and has a strong interest in silicon photomultiplier-based detectors.
Ernst Wehlage
PLC2
After graduating from university, Ernst Wehlage started in Darmstadt in the digital development of professional video systems for the future HDTV technology.
In complex systems, FPGA technologies were used early on to achieve the high data rates. These technologies were decisive for the development of new innovative film and video systems in high-resolution real-time processing.
With now over 30 years of professional experience in training and application of programmable logic, the fascination of these possibilities is unbroken, as continuously innovative technology leaps provide hardware developers and now also software developers with ever better methods.
Since 2001 he has been a member of the PLC2 team and has been a speaker on almost all topics of PLC2 training courses, designs FPGA-based systems for customers, and advises developers on how to solve their development tasks. He was recently named the number 1 AMD trainer worldwide in 2023.
Espen Tallaksen
EmLogic AS
Espen is the CEO and founder of the newly established EmLogic and previously also Bitvis, both independent design centres for embedded software and FPGA, - with Bitvis as a leading Nordic company within its field and EmLogic now already well on the way to the same size and position. He graduated from the University of Glasgow (Scotland) in 1987 and has 30 years’ experience with FPGA and ASIC development from Philips Semiconductors in Switzerland and various companies in Norway. During twenty years Espen has had a special interest for methodology cultivation and pragmatic efficiency and quality improvement.
One result of this interest is the UVVM verification platform that is the #1 VHDL verification methodology and library world-wide, and in fact the fastest growing FPGA verification methodology independent of HDL.
He has given many presentations and keynotes internationally on various technical aspects of FPGA development, including lots of hands-on tutorials and presentations at FPGA-Kongress every year since 2016; - all with a crowded audience and great feedback. He is also giving courses world-wide on how to design and verify FPGAs more efficiently and with a better quality.
During twenty years Espen has had a special interest for methodology cultivation and pragmatic efficiency and quality improvement. One result of this interest is the UVVM verification platform that is currently being used by companies world-wide.
He has given many presentations and keynotes on various technical aspects of FPGA development. He is also giving courses on how to design and verify FPGAs more efficiently and with a better quality. 'Advanced VHDL Verification – Made Simple ' (3 days) and 'Accelerating FPGA design' (2 days) are both arranged in Germany in cooperation with Trias Mikroelektronik. Espen also had a hands-on tutorial and two presentations at FPGA-Kongress in 2016; - both of them with a crowded audience and great feedback on the interesting technical contents.
Fabian Heinrici
Efinix GmbH
Fabian's remarkable career in the semiconductor industry spans over eight years, during which he has consistently excelled in the field of Field-Programmable Gate Arrays (FPGAs). His journey from Future Electronics to Arrow, a five-year stint at Lattice Semiconductor as a Regional Sales Manager, and his current role at Efinix have been marked by dedication, expertise, and a relentless pursuit of excellence. Today, he holds the position of Regional Sales Manager for EMEA, with Munich as his base of operations.
Contact me via linkedin www.linkedin.com/in/fabian-heinrici
Francesco Contu
Avnet EMG Italy Srl (Silica)
Francesco Contu is High Speed and RF System solution Expert for EMEA at Avnet Silica in Milan, Italy.
He has +30 years of experience, his career started at Alcatel (now Nokia) where he architected and designed several mixed signals boards with various interfaces including backplanes, copper and optical links.
He then joined Xilinx where he worked as High Speed IO and then RF Specialist for almost 20 years, before joining Avnet Silica.
He holds a Master in Electronic Engineering form the “Politecnico di Milano” University.
Francisco Perez
Technical Director – EMEA | Future Electronics S.A.
Experienced Design Engineer and System Architect with more than 25 years of industry experience. I’ve worked as Design Engineer and Engineering Manager before switching to technical sales roles as Field Applications Engineer and Solutions/Platform architect.
Fluent building architectures for High Performance and Cloud computing, AI and Video Analytics, and embedded computing platforms including heterogeneous processing and accelerators like CPU, GPU, FPGAs and adaptive SoCs for various markets including video and vision, industrial, healthcare, automotive, military and avionics.
Currently acting as Technical Director – EMEA at Future Electronics.
Karlo Mlakar
Senior FPGA Engineer | Xylon d.o.o.
Karlo Mlakar holds a Master’s degree from the University of Zagreb, Faculty of Electrical Engineering and Computing. He is currently one of Xylon’s lead developers of image signal processing and video camera interfacing products. Karlo has extensive knowledge in FPGA and adaptable SoC architecture and has successfully completed dozens of high-end projects for Xylon customers around the globe.
Hans-Jürgen Schwender
TRIAS Mikroelektronik GmbH
Hans-Jürgen Schwender has a masters degree in electrical engineering. From 1991 until the end of 2001, he worked as an ASIC design engineer at Philips Kommunikationsindustrie and Lucent Technologies in Nuremberg and at Infineon Technologies in San Jose, CA, USA. He worked on the creation of specifications, the implementation in VHDL, verification on module and chip level as well as programming of ASIC Driver Software in C.
Mr. Schwender has been working at TRIAS mikroelektronik GmbH since 2002 and, as the technical manager covers a large part of Siemens EDA's products - with a focus on HDL design, verification and cable harness design products.
Harald Flügel
Arrow Central Europe GmbH
Harald Flügel was born 1960. He studied electronic engineering at the Hochschule für Technik in Karlsruhe from 1981 to 1985 - right on time to see programmable logic evolve from the very beginning with simple PAL to modern high-end FPGA. Being a hardware engineer, he has developed lots of systems using these fascinating devices.
Since 2008, Harald is working at Arrow, most recently as Technology FAE for programmable logic.
Dr. Harald Simmler
Ing. Buero Harald Simmler
Dr. Harald Simmler is the Software Team lead at Hema. In this role, he is responsible for product development and is also driving the innovative Fast-Lane module based automization for more efficient and faster development.
Harald is a FPGA enthusiast working in the FPGA industry for over 20 years in different roles an areas. His PhD about Multitasking on FPGAs was only the starting point for a series of developments in the FPGA domain.
Harald Werner
Efinix GmbH
Over 28 years experience in the FPGA Market
Helmut Demel
Lattice Semiconductor GmbH
At the University of Applied Sciences in Landshut I studied electrical engineering with a special focus on Microelectronics.
There my own FPGA journey started in 1997 using an FPGA device in my thesis work.
Since then, I hold various positions (Application Engineer, Field Application Engineer) at Actel and Lattice Semiconductor, covering mostly the industrial and automotive market.
In my current role as Sr. FAE Manager, I’m in charge of the FAE team in Central Europe and always interested to stay in touch with our customers and partners.
Contact me as well via LinkedIN: https://www.linkedin.com/in/helmut-demel/
Hüseyin Anaç
NCAB Group Germany GmbH
Hüseyin Anaç is a trained electronics technician with over 20 years of professional experience in the electronics sector. He built up his field experience as a technician for packaging machines and later deepened this as a commissioning engineer for wet-chemical systems for the production of photovoltaic cells in the areas of mechanics, electrics, electronics and software. In 2008, he switched to a consulting role as a team leader in component sales. Since 2013, Mr. Anaç has been employed by NCAB Group Germany and has thus been working in the field of printed circuit boards, then as a technician and since 2019 as a Field Application Engineer.
Ido Wermuth
Arrow Central Europe GmbH
Ido Wermuth is a Technology Field Application Engineer (FAE) covering Austria, Switzerland and Germany.
He started his career at SanDisk as an FPGA design engineer. In 2022, he switched to distribution and work as FAE at Arrow. He supports all topics related to Lattice FPGAs.
Jakob Jungreuthmayer
FH Oberösterreich Studienbetriebs GmbH
Jakob Jungreuthmayer is currently enrolled in a bachelor's degree in Hardware-Software-Design at University of Applied Sciences Upper Austria in Hagenberg.
In his studies he focuses on both software-related and hardware-related topics in the field of embedded systems including software engineering, signal processing and digital design. He is also a supporter of Open Source and contributed to Open Source projects at the university, including the VHDLbyHGB and VUnitbyHGB extensions for VS Code. In addition to his studies he is currently employed at Infineon Technologies.
Jens Michaelsen
Avnet Silica
Jerry Armao
AMD
Jerry Armao joined AMD in October 2023 as DSP Specialist FAE.
He has more than 20 years of experience in wireless industry where he covered different positions such as system and embedded SW engineer, DSP algorithm developer, RF test engineer.
In the last years, he mainly focused on 5G active antennas with O-RAN interface.
Jerry received a MSc in Telecommunications Engineering in 2001 from the Polytechnic University of Milan, Italy.
Jim Lewis
SynthWorks Design Inc
Jim Lewis has over 30 years of design and teaching experience and is well known within the VHDL community. He is the Chair of the IEEE 1076 VHDL Standards Working Group. He is a co-founder of the Open Source VHDL Verification Methodology (OSVVM) and the chief architect of the packages and methodology. He is an expert VHDL trainer for SynthWorks Design Inc. In his design practice, he has created designs for print servers, networking, fighter jets, video phones, and space craft.
Joachim Goertz
3M
Joachim studied electrical engineering at the University of Applied Science (FH) Aachen. After his graduation in 1999, Joachim joined 3M as Application Engineer. Since that time he supports customers across EMEA on 3Ms Interconnect Product Portfolio (cables, connectors and cable assemblies).
Joachim Müller
Efinix Inc.
Upon graduating at TU Braunschweig in 1989, Joachim Müller held positions in ASIC development, sales and marketing, before joining Lattice Semiconductor in October 2000 as Senior FAE. Since October 2021 he is in charge of Field Application, Europe, for Efinix Inc.
Jorge André Gastmaier Marques
Analog Devices Inc.
Jorge is a Digital Design Engineer at Analog Devices Inc.
He works on FPGA design, and Linux and baremetal (no-OS) driver development, with the intention of providing full stack open-source solutions to interface ADI's parts.
He holds a B.Sc. in Electrical Engineering from the Federal University of São Carlos and is currently pursuing his master's degree at the University of São Paulo.
Previously, he researched embedded computer vision in the space & defense field, and he shifted his career to working on reference designs to better fit his advocacy for open-source solutions.
Dr. Jörg Pospiech
AVT GmbH Ilmenau
He studied electrical engineering at the Technical University of Ilmenau, where he also obtained his doctorate in the field of lightning protection. His doctoral work was flanked by patent applications and the development of a new product for the company Dehn SE.
He was then employed by CE-SYS GmbH Ilmenau as a development engineer for mirror replacement systems with FPGAs. Since 2004 he was in parallel active as managing director of AVT GmbH. He took over this activity completely from 2008 and has also been the sole shareholder since 2020. In the course of this time many customer projects with FPGAs were successfully developed. With the company motto "Solving the impossible" these orders and further research achievements were also always of a high standard.
Already in 2004 the first small FPGA development kit was manufactured in AVT and the first IP cores were created. With the latest developments we enter a new phase of collaborative DevKit development, which will be presented.
Kamil Rudnicki
Brightelligence sp. z o.o.
Kamil is co-owner of Brightelligence sp. z o.o., Poland. Apart from managing the company and projects, he performs research and development in the field of FPGAs across many applications like SDN, SDR, video conversion and HPC. During his 16-year-long FPGA journey, he participated in several high-profile projects. His professional interest focuses on optimization and complex system debugging - "a needle in a haystack."
He received his MSc from Lodz University of Technology, Poland, in 2008, and his Ph.D. from the University of Glasgow, UK, in 2014. His cientific background helps him succeed in challenging commercial projects. In his free time, he enjoys cycling and horse-riding.
Fabian Kluge
EFINIX GmbH
Fabian's FPGA experience covers more than seven years.
During this time, he has worked in industrial and automotive industry as a designer of hardware, FPGA and ASIC.
Before that, he studied electrical engineering and information technology at the Technical University of Munich and graduated with a Master of Science.
Today, he is a Field Application Engineer for the EMEA region and works from Munich.
Karan Kantharia
AMD
Karan joined the AMD-Xilinx in July 2019 after graduating with a master’s degree in computer engineering from Arizona State University, Tempe, USA. He leads product management & marketing of Versal adaptive SoCs, Evaluation Kits & Kria SOMs, a brand-new portfolio of Edge AI products that were built from the ground-up during his time at the company. Karan’s responsibilities range from defining product requirements, overseeing HW/SW development to planning product launches for new embedded platforms. He has been instrumental is creating go-to-market strategies for NPI products, enabling several customers and partners across the globe. Karan recently completed a graduate certificate program in Technology & Engineering management from Stanford University.
Dr. Karsten Trott
AMD
Dr. Karsten Trott, a seasoned expert in analog chip design and neural network processing, holds a PhD from TU Ilmenau. Starting his career at Get2Chip.com, he developed high-level RTL synthesis engines for VHDL and Verilog. His tenure at ESG GmbH saw him evaluating safety in BMW's drive-by-wire systems. As a worldwide FAE at Micronas, he introduced new HDTV chips globally. From 2006 to 2022, he supported A&D, space, industrial, and automotive clients’ success at Xilinx (now part of AMD). Currently, he oversees automotive key accounts including Bosch, Continental, BMW, Aurora, and Torc at AMD.
Klaus Kohl-Schöpe
Arrow Central Europe GmbH
Klaus Kohl-Schoepe is a Technology Field Application Engineer (FAE) covering the Central European region. He started in 1986 as a developer of measurement systems. In 1998 he switched to distribution and work as FAE at Silica, Rutronik and now for 16 years at Arrow. He supports all topics related to MCU/DSP/MPU including processor IP, associated software and IDE, memory, wired connectivity, safety, and security.
Leonardo Di Carlo
Microchip Technology GmbH
Leonardo Di Carlo is a seasoned FPGA and SoC engineer with extensive experience in embedded systems, digital design, and verification. With technical expertise spanning FPGA brands like Altera, Xilinx, and Microchip, as well as high-level modeling in Matlab/Simulink and Linux driver development. During his career he developed cutting-edge solutions for telecommunications, space, radar, and video processing applications.
Currently serving as a Technical Staff Engineer at Microchip Inc. since May 2020, Leonardo is an SME/RAE for the RiscV-PolarFireSoC family, providing benchmarking, mentoring, and support for Tier 1 customers.
Lukáš Kekely
Chief Technical Officer | BrnoLogic
has many years of experience in solving and managing research and application projects focused mainly on FPGA acceleration technology. As part of his work as an assistant professor at Brno University of Technology and also as a project manager in the CESNET association, he led groups of researchers and developers in the creation of project results, i.e. functional prototypes. In addition to practical implementation activities, he is also the author of research articles presented at international scientific conferences often published in impact journals. He has also received several prestigious awards for his professional activities, including the Josef Hlávka Award, the Werner von Siemens Award and the Minister of the Interior Award.
Marco Höfle
Avnet EMG AG
Marco Höfle, born in 1978, lives with his family in Switzerland and is employed by Avnet Silica. He supports customers in southern Germany, Switzerland and Austria. His tasks include customer consulting, customer-specific trainings as well as customer support in their development with Xilinx products.
The Big "X" runs through his entire professional career, starting with his diploma thesis, technical support at Xilinx in Dublin, development management in an engineering office and since May 2018 as Embedded Specialist Xilinx SoC at Avnet Silica.
Marco Smutek
Arrow Central Europe GmbH
Marco Smutek is a Technology Field Application Engineer (FAE) covering Switzerland and Southwest Germany. Having started his career at Xilinx in 2004, he joined PLC2 as a trainer before accepting his position as FAE at Arrow in 2014. He supports all topics related to FPGAs from Altera and Microchip.
Markus Leiter
P2L2 GmbH
Markus Leiter is an experienced FPGA Design and Verification Engineer with a strong background in embedded systems design.
He co-founded P2L2 GmbH, an FPGA Design Center based in Hagenberg, Austria, where he currently serves as CEO.
His expertise spans various aspects of FPGA design, including concept engineering, functional verification, and timing analysis.
In addition to his role at P2L2, Markus works as a Teaching Assistant and Tutor at the University of Applied Sciences Upper Austria, focusing on VHDL design and verification methodologies.
Prof. Dr. Markus Pfaff
FH Oberösterreich Studienbetriebs GmbH - P2L2 GmbH
Markus Pfaff adopted HDL for digital design in 1989 and did the first HDL based FPGA design ever done at the Technical University Darmstadt starting in the winter of 1991 in the proprietary hardware description language REGLAN at a time when synthesis simply was not available and rudimentary simulation ran on a VAX VMS computer occupying a large room in the university basement.
Ever since he focused his career on FPGA and ASIC design methodology as well as advanced co-simulation techniques and engaged in several academic and industrial projects including the design of the Infineon S-GOLD chip, which you find at the heart of the original iPhone.
In 2002 he was appointed as a full professor at the University of Applied Sciences of Upper Austria at Hagenberg. His recent research topics span design and verification methodology especially targeting signal processing applications.
He is co-founder and CEO of the Austrian-based embedded and FPGA design service provider P2L2 and runs an FPGA consulting business since 2004.
Markus Pfaff holds a Dipl.-Ing. degree in Electrical Engineering from Technical University Darmstadt and a PhD in the field of methods for advanced digital simulation from Johannes Kepler University Linz.
Martin Kellermann
Microchip Technology GmbH
Martin Kellermann is a Marketing Manager at Microchip Technology GmbH, Munich. Earlier he was a Staff Field Application Engineer at Xilinx. He is a seasoned FPGA and SoC professional with a track record of successful customer and project engagements in the industrial, automotive, and data-center domains. He possesses a strong background in high-speed serial data transmission, signal integrity and hardware debugging which helped numerous customers finish their designs successfully. He has also taught courses covering industrial applications and hardware concepts. Martin is a graduate of the Landshut University of Applied Sciences.
Mathias Sandner
Lauterbach GmbH
Mathias Sandner
graduated from the Technical University of Munich with a Master's degree in Electrical Engineering and a minor in Computer Science. He has been working as a full-stack developer and system engineer for Lauterbach for the last 8 years. He has experience with numerous debug and trace interfaces used in the industry, in particular the implementation of the hardware and software on the tool side of these interfaces.
Matthias Kern
FH Oberösterreich Studienbetriebs GmbH
Matthias Kern is currently studying the masters degree Embedded Systems Design at FH Hagenberg. There he specializes in Hardware Design and Signal Processing.
Matthias has worked with both Altera and AMD Xilinx SoC-FPGAs to realize
sophisticated systems. In an ongoing Project, Matthias is working with an AMD
Xilinx RFSoC FPGA to implement a high speed data sampling system. Besides his
studies, Matthias is employeed at Infineon Technologies as a working student, where he develops FPGA-based boards to interface with DUTs for verification and testing.
Maximilian Werner
Efinix GmbH
Maximilian's FPGA experience covers more than five years. During this time, he has worked in the automotive industry as an FPGA developer. Before that, he studied electrical engineering and information technology at the Technical University of Munich and graduated with a Master of Science. Today, he is a Field Application Engineer for the EMEA region and works from Munich.
Michael Hutchison
Senior Director - Customer Experience Engineering, Software and Solutions | AMD
Michael Hutchison, senior director at AMD, is an industry veteran with more than 20 years of experience architecting, developing, and building leading-edge FPGA and adaptive SoC products for markets including automotive, consumer, and test & measurement. Michael leads the Customer eXperience Engineering, Software, and Solutions teams. This role encompasses driving the AMD Vivado™, Vitis™, Vitis AI, System Software, and IP solutions to meet customers’ needs. He is also responsible for ensuring that AMD adaptive SoC and FPGA products have a full solution stack available to enable customers in today's complex development environments. Michael holds a Bachelor of Applied Science in Computer Engineering from Simon Fraser University, holds seven patents, and has lived and worked in Germany and Canada throughout his career.
Michal Pacula
Aldec, Inc.
Michal Pacula, Technical Support Manager, over 25-year experience in FPGA/SoC, joined Aldec in 1998 and worked in a wide range of positions that include Application Engineer and SQA Manager responsible for Active-CAD, Active-HDL and Riviera-PRO products. Michal’s practical experience includes Digital Design, Verification Methodologies, Linting and a deep understanding of HDL modeling. Michal graduated with M.S. in Electronic Engineering (EE) at the Silesian University of Technology in Gliwice, Poland.
Nikolai Krassin
PLC2
Nikolai studied Embedded Systems Engineering in Freiburg.
He's been working as a Trainer at PLC2 since 2010 for the following topics:
Developing projects using FPGAs, MPSoCs and VHDL.
Nilesh Shilankar
Staff Applications Engineer, FPGA Solutions | Synopsys Inc
Nilesh Shilankar is a Staff Applications Engineer in Synopsys covering FPGA-based prototyping and implementation. His expertise is in FPGA synthesis, hardware validation, high reliability, and functional safety.
Oliver Bründler
Enclustra GmbH
Expert in FPGA/SoC design with 13 years of experience in digital signal and video processing on FPGA. Received a BSc degree in microelectronics in 2009 from the technical college FHNW, Switzerland. Worked at Paul Scherrer research institute in Switzerland, developing electronics for particle accelerators. Currently at Enclustra, where he spent 11 years as an FPGA/SoC system designer and project manager, working on customer design projects.
Oren Hollander
HandsOn Training Inc.
Oren Hollander has over 20 years of FPGA, ARM, Security design & training experience.
Oren is an Intel, ARM, NXP, ST, NewAE, eShard, and Microchip authorized trainer.
Oren trained over the years thousands of engineers around the world in FPGA design, Arm architecture, security for Embedded systems & FPGA security.
He trains the top noche silicon vendors such as Apple, Samsung, Marvell, NXP, Intel, Broadcom, Microchip to name a few, so his knowledge is always one step ahead of the general market.
Oren specialized in the military field as well, and works as senior consultant to the top notch military companies in Israel and abroad.
Oren works closely with the silicon vendors and security researchers to bring the latest and greatest know-how and experience to the market.
Pablo Leyva Camacho
Citrobits GmbH
Pablo Leyva is a Telecommunications Engineer specialized in FPGA development. With experience in the automotive and consumer electronics industries, he founded Citrobits in 2020 to provide ready-to-deploy modular solutions and custom FPGA/hardware development, leveraging the latest FPGA technologies used in markets like healthcare, industrial robotics, or telecommunications. Based in Munich, Germany, Citrobits is embedded electronics focused startup dedicated to simplifying the adoption of new FPGA technologies.
Patrice Brossard
Future Electronics S.A.
After obtaining degree at the French “Paris Orsay University”, I spend almost 10 years designing ASIC at the company Bull then 2 years at a car manufacturer working on automotive electronic network.
Since the years 2000, I’m working in the electronics component distribution environment. I have been working now for more than 15 years at Future Electronics supporting and promoting FPGA technologies with a new role of Vertical Segment Manager in charge of Programmable Logic for 3 years now.
Passionate about new electronic technologies and always be on the lookout for the needs of the new applications in order to address the markets of the future.
Patrick Lehmann
PLC2
Patrick Lehmann, a graduate of computer science from Technische Universität Dresden, Germany, embarked on his journey in computer engineering and architecture as a tutor. Over time, his focus shifted towards digital design, FPGA technology, and high-speed communication solutions such as Serial-ATA, Gigabit Ethernet, and PCI Express.
With a passion for sharing knowledge, Patrick actively engages in teaching, research, and social platforms. His research endeavors span diverse areas including in-memory database systems, Serial-ATA protocol implementation, and the integration of FPGAs into Cloud infrastructure.
Since 2017, Patrick has been an integral part of PLC2 GmbH, where he serves as a trainer specializing in VHDL, OSVVM, FPGA technology, and PCI Express. His dedication and expertise led him to his current role as the Head of System Engineering at PLC2 Design GmbH since 2023.
Patrick Lehmann's contributions extend beyond the confines of his workplace. He is a developer and maintainer of the PoC-Library, an open-source IP core library that transcends platforms and vendors. Additionally, he actively contributes to the GHDL project, a renowned free VHDL simulator. Notably, in 2016, he initiated the "Open Source VHDL Group," aiming to create a comprehensive collection of VHDL packages freely accessible to all.
Patrick is deeply engaged in standards development, notably within the IEEE P1076 "VHDL Analysis and Standardization Group" since 2014. His significant involvement includes detailing and drafting substantial portions of the language changes for the upcoming VHDL-2018 revision. Recognized for his contributions, Patrick was appointed as a vice-chair of the IEEE P1076 working group in 2017. Presently, he collaborates with IEEE to release all VHDL language packages as open source, while also spearheading efforts to establish a new collaborative, open-source publishing flow within IEEE.
Patrick Urban
Cologne Chip AG
Patrick Urban studied applied mathematics and informatics at FH Aachen and computer engineering with specialization in networked and embedded systems at University Duisburg-Essen, Germany.
Since 2012, he is part of the engineering team at Cologne Chip AG and contributes to their latest development, the GateMate FPGA family. In addition to his work in development and technical support, he is the contact person for open source tools.
Salma Hamdoun
Arrow Central Europe GmbH
With a solid foundation built on five years of successful engineering studies, Salma has accumulated extensive experience across multiple industries.
For most of her career, Salma dedicated eight years to the aerospace industry, followed by three years in the automotive sector. During this time, she held various operational positions and management roles, where she honed her skills in leadership, project management, and strategic decision-making.
Driven by a passion for innovation and emerging technologies, Salma transitioned to the distribution sector as a Field Application Engineer specializing in FPGA solutions at Arrow covering DACH area ( Germany, Switzerland and Austria).
Based in Munich.
Shivani Saravanan
Intel Deutschland GmbH
Shivani Saravanan is Product FAE at Intel PSG (Altera) focusing on Mid-Range and Low-End FPGAs and supporting customers across Industrial and Automotive sectors. Before joining Altera, she was also an FAE at Dialog Semiconductor (Renesas Electronics) after graduating from Technical University of Munich where she majored in Communications Electronics.
Simon Heimbach
Universität Stuttgart
Simon Heimbach works as a doctoral student on the subject of heterogeneous computing in embedded systems at the Institute of Aircraft Design at the University of Stuttgart. He works on technologies that help developers to benefit from the strengths of different architectures. These include evaluating projects and partitioning those into logic for concurrent chips in a single system.
Sonja Schoissengaier
FH Oberösterreich Studienbetriebs GmbH
Sonja Schoissengaier is currently in her final year studying for a bachelor’s degree in Hardware-Software-Design at the University of Applied Science in Upper Austria. During her academic journey, she delves into a broad spectrum of subjects within embedded systems. This includes software engineering, signal processing, and digital design.
In her last two semesters, she and two of her peers worked on their study project, VHDLbyHGB.
In addition, she is currently completing an internship with Rosenbauer International AG.
Dr. Riadh Ben Abdelhamid
Heidelberg University
Riadh Ben Abdelhamid received his Bachelor of Electrical Engineering degree from the National Engineering School of Tunis in 2010.
Since 2010 until 2015 he has been an FPGA design and verification engineer in a large Europe-based avionics company
where he took a leading role in designing and verifying safety critical systems including a flight control system.
In 2015, he joined Synopsys as a subcontractor on their flagship FPGA emulation system ZEBU.
In 2017, he was selected as a Japanese Government Scholarship (MEXT) recipient to study in Japan. Subsequently, he obtained
his Master and PhD degrees in Engineering (Computer Science) from the University of Tsukuba, in March 2020 and 2023, respectively.
He is currently a postdoctoral researcher in the Novel computing Technology group at Heidelberg University, Germany.
His research interests include many-core processor architectures and overlays, High-Performance Computing and reconfigurable accelerators. He is also enthusiast about making his own many-core processor chip start-up.
Stanislaw Klinke
EBV Elektronik GmbH & Co. KG
Graduate engineer, employed for more than 20 years in various positions in the semiconductor industry.
He gained his experience as ASIC and FPGA developer while working on projects for consumer and industrial applications.
Since 2012 working as Field Application Engineer at EBV Elektronik.
Besides various tasks in the field of high-end processing, he focuses especially on projects in the area of machine learning and artificial intelligence.
Stefan Garcia
Intel Deutschland GmbH
Embedded Technology Specialist FAE at Intel PSG (Altera) supporting customers across multiple vertical segments in developing FPGA based embedded solutions. Joined Altera in 2000 after having gained 1st applications engineering experience at Cypress Semiconductor. More than 20 years’ experience supporting customer design in of FPGA technology primary in telco, data-center and industrial segments.
Ted Speers
Head of Product Architecture and Planning, Technical Fellow | Microchip Technology Inc.
Ted Speers is a Technical Fellow at Microchip’s FPGA BU, where he is responsible for defining its roadmap for low power, secure, reliable FPGAs and SoC FPGAs. Ted is a RISC-V leader and evangelist and has served on the Board of Directors of RISC-V International since its inception in 2016. He joined Actel (now part of Microchip) in 1987 and held roles in process engineering and product engineering before assuming his current role in 2003. He is co-inventor on 35 U.S. patents. In his role, Ted has consistently defined first of it’s kind products, the most recent example being PolarFireSoC, the first RISC-V based SoC FPGA. Prior to joining Actel, he worked at LSI Logic. Ted has a Bachelor of Science in chemical engineering from Cornell.
Thomas Siebert
Intel Deutschland GmbH
Thomas Siebert is a Field Application Engineer at Altera (an Intel Company) focusing on High-End and Mid-Range FPGA in Test, Broadcast & workload acceleration. FPGA Hard- and Software have accompanied his whole professional career of 28+ years. He joined Intel PSG as an FAE in 2017 shortly after Altera was acquired by Intel. Before that he worked as dedicated FPGA FAE, FAE Manager and Business Development Manager for the Altera Distributors Sasco (an Arrow company) and EBV Elektronik.
Thomas Zerrer
Smartlogic GmbH
Thomas Zerrer studied electronic engineering and received a „Dipl. Ing“ degree from the University of Stuttgart in 1994. Active in the field of PCI and PCI Express since 2002. Founded Smartlogic GmbH in 2005 as owner and CEO. Main activity is the definition and development of DMA IP Cores.
Tom Richter
The MathWorks GmbH
Tom Richter joined MathWorks in Germany 2011 and worked 10 years as a Training Engineer for Model Based Design, Signal Processing, Communications, and Code Generation. With a strong focus on ASIC and FPGA design, he also developed training courses for HDL code generation and HW/SW co-design.
Since 2021, Tom works as an Application Engineering Specialist for HDL and System-on-Chip. Tom has a Master of Engineering degree from the University of Ulster in Belfast and a Diploma of Electrical Engineering from the University of Applied Sciences in Augsburg.
Tomasz Iwanski
Senior FPGA Technology Field Application Engineer | Arrow Central Europe GmbH
Tomasz Iwański is Senior FPGA Technology Field Application Engineer covering Eastern Europe and Turkey. Before joining ARROW as FPGA FAE in 2021, he worked in NOKIA since 2018 as FPGA Design Engineer for 5G products, in APTIV since 2017 as RADAR Engineer for Automotive ADAS and since 2015 in Polish company ASTOR where he started his professional career as Project Engineer for industrial robotics and automation.
Udo Blaga
Avnet Silica
Udo Blaga, in the business for more than 20 years is employed by Avnet Silica Germany. He is member of the Avnet Silica Power team; these three people supporting customers in Switzerland, Germany and Austria. His tasks include product presentation, customer-specific trainings as well as customer support in their development with power products.
Ümran Yungucu
Bull Technologies
She completed her bachelor's studies in electrical and electronics engineering with a double major in physics at Bogazici University in Istanbul, Turkey, in January 2024. Fueled by curiosity in theoretical concepts and fast practical implementations in signal processing and communications theory, her research interests are rooted in embedded systems applications.
Currently, she is working as an FPGA developer at Bull Technologies, a research and development startup focusing on high-frequency trading.
In the fall of 2024, she will begin her PhD study at Boston University in the field of ECE, with a focus on "fully homomorphic encryption based on post-quantum cryptography".
Venu Madhav Ega
Staff Application Engineer, FPGA Solutions | Synopsys Inc.
Venu has been developing FPGA solutions since 2010 in various industries such as Automotive, Infotainment, Medical, and Networking. He joined Synopsys in 2018 as a Staff Application Engineer supporting customers in the central Europe region for FPGA implementation and prototyping solutions.
Wolfgang Loewer
El Camino GmbH
Wolfgang Loewer is CTO and Co-Founder of El Camino GmbH. After graduating from the Munich University of Applied Science he started his career as Field Applications Engineer at Altera in 1991. He then Co-Founded El Camino as a design house for programmable logic in 1999 which soon after also specialized in functional verification of ASIC designs.
Wolfgang Loewer has over 30 years of design, consulting and teaching experience in FGPA development and ASIC verification.
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